Tag Archives: VIP

NVMe VIP Architecture: Host Features

NVM Express or the Non-Volatile Memory Host Controller Interface is a host-based software interface designed to communicate with Solid State storage devices across a PCIe fabric. Synopsys VIP for NVMe is designed to help thoroughly verify NVMe designs using both random and directed simulation. This article from Synopsys outlines the NVMe commands by considering the features and capabilities of Verification IP.

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How to cut Verification time with VIP

Verification IP (VIP) addresses many of the inherent challenges in verifying today’s complex designs, but must meet certain requirements. It needs to be proven, provide checks that ensure protocol compliance, and enable the collection and analysis of coverage data, minimizing the time to productive verification. This article from Mentor Graphics shows practical ways to use verification IP for greater productivity with specific code by referring the QVIP.

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Resolving the limitations of a Traditional VIP for PHY Verification

Because of the complexities involved in the entire design verification flow, a traditional Verification IP tends to overlook the subtle aspects of the physical layer (PHY) verification, often leading to costly debug phases in the verification cycle.

This article from Mentor Graphics describes the limitations of a traditional VIP, which can typically be resolved using an exclusive PHY verification.

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How do you choose the right memory VIP for your application?

This article from Tech Design Forum outlines how the Verification IP (VIP) can help, especially for memory implementations, providing tools that enable verification engineers to test an implementation against specific vendor memory components.

Additionally this article also describes the key points, which help to choose the right memory VIP for your application.

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