Low-Power Verification with UPF Successive Refinement Methodology

This article from Mentor Graphics announces the support for the Low Power Successive Refinement Methodology using Questa® Power Aware Simulation and new capabilities in the Visualizer Debug Environment to dramatically improve verification re-use and productivity for low power designs using ARM® technology.

Read More

2015-09-30T05:43:14+00:0030th September, 2015|Blog, Thought Leadership|