Metric Driven Verification of Reconfigurable Memory Controller IPs

The Metric driven controller model, along with the asynchronous comparison approach aids the reuse of the proposed memory controller verification IP for wide varieties of the Controllers. This technique can be further enhanced to build a universal verification IP for controllers which have similar functionalities that can be reused.

The article presents a method for verifying a standard SDRAM controller IP, based on UVM framework using the Object Oriented verification language System Verilog.

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2015-06-03T06:12:20+00:003rd June, 2015|Blog, Thought Leadership|