Moving verification to the system level

Our chip development teams are becoming more and more involved in the target systems. Such systems often involve complex algorithms which teams want to model before they partition them into hardware and software. Engineering teams often use MATLAB, Simulink, and Model-Based Design for their algorithm and behavioural designs.

Such executable specifications can be used throughout the design flow including simulation with their core digital, analog, and mixed-signal IC design.

This article identifies such verification flows based on Synopsys tools and methodologies.

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