Parameterized Interfaces and Reusable VIP

This article from Synopsys discusses SystemVerilog interfaces and strategies for dealing with parameterization. This post describes a possible workaround for the problem that parameterization of system Verilog interfaces introduce to testbench code. The testbench must set up the strongly typed accessor class and pass this in to the VIP, but after this all interaction with the VIP can be performed without needing to parameterize the VIP.

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2015-03-05T09:55:49+00:005th March, 2015|Blog, Thought Leadership|