“Portable Stimulus”: System-level verification trends for 2017 and beyond

Portable Stimulus model is used as an input to synthesize tests for a variety of target execution platforms, including UVM, simulation, emulation, post-silicon validation. This article from Embedded Computing describes what makes portable stimulus different from other verification languages and outlines the ways why the industry is continuing to learn more about the trends of system-level verification.

Read More


Find out how T&VS portable stimulus specification addresses today industry verification challenges.