Power Aware Static Verification—From Power Intent to Microarchitectural Checks of Low-Power Designs

PA-Static verification, are performed on designs that adopt certain power dissipation reduction techniques through the power intent or UPF. The term static originates from verification tools and methodologies that applies a set of pre-defined power aware (PA) or multi-voltage (MV) rules based on the power requirements, statically on the structure of the design. More precisely, the rule sets are applied on the physical structure, architecture, and microarchitecture of the design, in conjunction with the UPF specification but without the requirements of any external stimulus or testbenches.This article describes the foundations of power aware static verification and the solution features used for its verification.

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2018-03-30T14:54:11+00:0030th March, 2018|Blog, Thought Leadership|