The semiconductor industry has achieved significant productivity increases by the development, deployment, and scalability of reusable design IP. The EDA industry has also achieved significant productivity increases by virtue of the development, deployment, and scalability of reusable verification IP. A remaining bottleneck in the SoC development process stems from the inability to reuse verification stimulus across design scope and verification engines. This article highlights why SoC development has hit a bottleneck when it comes to re-using verification stimulus.
How Can T&VS Help with Portable Stimulus?
T&VS are a leading expert in test and verification and having worked on numerous complex test and stimulus projects and are therefore ideally placed to provide expert, independent advice on the use of Portable Stimulus and to undertake verification projects based on the standard. Read More: T&VS and Portable Stimulus