Using Digital Verification Techniques on Mixed-Signal SoCs

Last week we posted a blog discussing an article by Bryan Bailey contrasting the metrics driven verification approach we take in digital with the approach taken in analog verification.

TVS argued that digital verification techniques were now being applied to analog designs and quoted a recent project where TVS applied UVM to analog verification. In a separate article TVS discussed the use of Analog modeling techniques.

This white paper continues that discussion, describing a scalable and reusablemethodology for verifying analog IP. Reuse is made possible by correct modeling of verification models that can be stitched into the SoC.

Read more.