Active Event Blog

See T&VS at RISC-V Summit 2018 – 03-06 December, Santa Clara Convention Center, Santa Clara, CA, USA

The RISC-V Foundation announced its first annual RISC-V Summit at the Santa Clara Convention Center in Santa Clara, Calif. from Dec. 3-6, 2018. The Summit, in partnership with Informa’s Knowledge & Networking Division, KNect365, will gather the RISC-V ecosystem for a multi-track conference featuring keynotes, tutorials, exhibitions and networking receptions. The RISC-V Summit will host multi-track technical sessions, [...]

2018-10-26T12:38:41+00:0024th October, 2018|Active Event, Thought Leadership|

See T&VS at DVCon Europe 2018 – 24-25th October, Munich, Germany

The Design and Verification Conference (DVCon) Europe is the leading European event covering the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored by Accellera Systems Initiative™, DVCon Europe brings chip architects, design and verification engineers, and IP integrators the latest methodologies, techniques, applications and [...]

2018-09-05T06:42:52+00:005th September, 2018|Active Event, Thought Leadership|

T&VS to present on “Delivering on the promises of Portable Stimulus” at Cadence CDN Live EMEA

Join us at CDN Live EMEA  (May 7-9, 2018) where Mike Bartley, T&VS Founder and CEO will be presenting: "Delivering on the promises of Portable Stimulus". In the talk Mike will cover: An introduction to the Portable Stimulus Standard (PSS) Achieving Shift Left: Showing a system level scenario PSS and Cadence's Perspec System Verifier adoption – [...]

2018-04-27T09:42:20+00:008th March, 2018|Active Event, Events, Projects, Thought Leadership|

T&VS to present on “Delivering on the promises of Portable Stimulus” at Cadence CDN Live USA

Join us at CDN Live Silicon Valley, USA   (April 10-11, 2018) where Mike Bartley, T&VS Founder and CEO will be presenting: "Delivering on the promises of Portable Stimulus". In the talk Mike will cover: An introduction to the Portable Stimulus Standard (PSS) Achieving Shift Left: Showing a system level scenario PSS and Cadence's Perspec System [...]

2018-04-27T09:43:13+00:006th March, 2018|Active Event, Events, Projects, Thought Leadership|

T&VS to present on “Cyber Security of Medical Devices” at the Theatres & Decontamination Conference

Join us at the Theatres & Decontamination Conference (March 14, 2018 Warwickshire, UK) where Bryon Lowen from T&VS will be presenting the company's latest knowledge and experience of testing medical software for compliance with the IEC 62304 standard. Cyber Security of Medical Devices The opportunities for IoT to revolutionise healthcare are vast. In the future [...]

2018-03-14T10:24:20+00:006th March, 2018|Active Event, Events, Projects|

How Formal Reduces Fault Analysis for ISO 26262 Safety Verification

The ISO 26262 standard defines straightforward metrics for evaluating the “safeness” of a design by defining safety goals, safety mechanisms, and fault metrics. However, determining those metrics is difficult because evaluating every possible fault is impractical on the size of today’s designs. Formal verification tools have an advantage over other approaches because formal tools have [...]

2017-12-08T02:32:42+00:008th December, 2017|Active Event, Blog, Events|

Customising APIS IQ software for ISO26262 safety analysis – Closing the gap from concept to Verification

Complex designs achieve ISO26262 via the introduction of Safety Mechanisms to protect against random hardware faults that can cause a violation of a Safety Goal. The challenge is in performing a comprehensive safety analysis of the design, and proving the completeness of the analysis in an efficient manner. Krishna Priya Chakiat Ramamoorthy from Infineon Technologies [...]

2017-12-07T07:06:50+00:007th December, 2017|Active Event, Blog, Events|

Formal fault analysis for ISO 26262 fault metrics on real world designs

Safety critical development processes, governed by standards such as ISO26262, include the use of fault correction components that protect the device against Random faults that occur naturally during operation. A methodology has evolved that makes use of fault simulation and formal techniques to establish the diagnostic coverage of safe faults, and detect dangerous faults. A [...]

2017-12-06T10:08:24+00:006th December, 2017|Active Event, Blog, Events|

Methodologies for Rigorous Safety Verification

Autonomous driving is becoming real. Coming out of the realm of research, autonomous vehicles are now on roads around you. Safety of these vehicles is an important consideration in their design. How do you make sure that the vehicle is safe enough for you to put your loved ones in it? Ann Keffer, Product Management [...]

2017-12-05T11:24:37+00:005th December, 2017|Active Event, Blog, Events|