Job description:

  • Execute on pre-silicon verification of mixed signal and digital verification aspects of Automotive products.
  • Create re-usable test benches from grounds up using TCL, system-Verilog, Verilog-AMS with emphasis towards behavioral modeling of analog blocks, closed-loop simulation with digital design and analog behavioral models and/or transistors by using Cadence Virtuoso schematic editor and ICFB tool environment, and automated & coverage-driven verification.
  • Create and maintain verification plans & verification reviews, and work with the entire product team to close issues through bug tracking for a first pass success.

Basic qualification and skills required:

  • 5+ years of experience in Mixed Signal Design Verification experience.
  • Experienced with successful tape out of mixed-signal products from verification plan to sign-off by means of reusable self-checking test bench development, coverage models, assertion based checking , and automated constrained-random verification methodologies like UVM/OVM is a plus.
  • Good understanding of Analog basics, able to understand the analog functionality and SPICE simulation experience.
  • Good Work experience on modules like LDO’s, LIN transreceivers, Oscillators etc.
  • Very good debug skills in both RTL and schematic simulations is a must.
  • Experienced in creating verification plans, TCL scripting*& tool usage with familiarity on using SystemVerilog, Verilog-AMS, Verilog-A & Verilog behavioral modeling as event based models, Cadence Virtuoso
    schematic editor, ICFB tool environment, PERL, shell scripting,irun, bug tracking, configuration management (DesignSync),regression management.
  • Good knowledge about Automotive products is a plus.

Location: Bangalore, India


  • Highly competitive to match experience and capability

How To Apply

Send your CV to [email protected]