Job Description:

Candidate will be part of Verification team who takes care of AMS blocks verification (mostly through JTAG sequences) and then handing off those vectors to ATE team.


  • Support AMS pattern delivery to Product Engineering team for validating chip function/characterization on ATE that includes FUSE/PLL/HTOL/MBIST
  • Having good knowledge on post silicon support working closely with Product Engineering team and IP Design teams
  • Have knowledge about DFT(JTAG/BSCAN).
  • Have background knowledge of High speed IO(USB/PCIE/DDR) is a plus.
  • Have Memory BIST knowledge is a plus.
  • Have basic knowledge of Verilog/SV.
  • Know the language of C/C++.
  • Familiar with script language like Perl/Python is a plus.

Experience: 3 to 8 Years

No. of engineers: 4

Start Date: Immediate

Location: Hyderabad


  • Highly competitive to match experience and capability

How To Apply: Send your CV to [email protected]