Core Data Path (CDP) ARM
- Be responsible for verification of ISA (x86 , ARM), computer architecture, including memory sub-systems, cache hierarchies, and pipelined design. Possesses specialized knowledge of Computer architecture and computer arithmetic (a plus)
- Be part of a team of designers and verification engineers, working closely with other team members to implement and verify the functionality of a given design element within the context of the block, chip and overall system as well as to design features for the next generation in RTL.
- Must have good knowledge on the verification flows. Excellent hands-on debug skills and problem solving attitude.
- Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC
- Experience of working on Functional Verification, SoC Verification, Emulation
- Good in programming : System Verilog, PLI/DPI interface, C/C++, PERL/Shell script, assembly language,OVM/UVM Methodology knowledge and experience
- Must have good communication skills and the ability to work in a team environment.
- Preferably having experience in architecture such as x86 or ARM domain based SOC
- 5+ Years
- Highly competitive to match experience and capability