Job Title:

Digital Verification Engineer

Job Code:


Job Description

  • Writing and debugging test-bench constraints
  • To model complex arithmetic operations and debug
  • Must be available for at least 1 year, preferably longer

Knowledge/Skills required:


  • Senior Digital Verification Engineer (minimum 4 years of experience in Verification)
  • SV UVM experience
  • Experienced in modelling and closing coverage
  • Must be adaptable and a quick learner
  • A self-starter (works well in a team but good at owning tasks)
  • Excellent communication skills
  • Familiarity with version management tools

Nice to have:

  • Experience in some or all of the following tools:
    1. Specman
    2. Incisive or Xcellium
    3. VManager
    4. Clearcase
  • Knowledge of signal processing algorithms including FFT
  • Scripting ability.


  • UK


  • 4+ Years

Open Positions

  • 1


  • Highly competitive to match experience and capability
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