Job Code: HWDUSA060717_21
- Looking for a mid level analog and mixedsignal circuit designer to work on SerDes PHY designs.
- This designer will be involved in delivering nextgeneration 1012Gbps
- PHY designs for SoCs and will be part of a growing team involved in leadingedge
CMOS process technology nodes at 14nm and beyond.
- Design goals also include lowpower analog designs to address customer lowpower wireless products.
- The primary responsibility of this position entails working within a team to deliver analog and mixedsignal transistor level circuit designs along with the physical layouts of the high speed circuits for highspeed, lowpower PHY SerDes blocks.
- Standard knowledge of PCIe, USB, MPHY is a plus.
- Experience in designing opamps, CML, PLL, DLL, TX driver, CTLE, CDR, DFE
- Experience in using SPICE simulators (Cadence Analog Artist experience is preferred).
- Experience using schematic capture tools (Virtuoso preferred).
- Signal integrity in high speed wireline design Fullcustom analog layout techniques and the ability to take a design and do all the layout post extract verification and signoff
- Understanding of CMOS process effects on designs and layout of Finfet technology
Education: Required: Bachelor’s, Computer Engineering Preferred: Master’s, Computer Engineering or equivalent experience
Job Status: Full Time
Work Location: California – San Diego
- Highly competitive to match experience and capability
How To Apply: Send your CV with Job Code to [email protected]