Job Title:

IP Verification Engineer

Job Code:


Required skills and experience

  • You can demonstrate experience in working with constrained-random verification including ownership of a suitably complex verification environment
  • You have experience of using SystemVerilog and UVM to develop verification components
  • You hold experience in developing re-usable and scalable code
  • You are familiar with the tools and processes for developing test benches and finishing all aspects of the verification process
  • You are competent in developing verification flows, making the best use of EDA tools
  • You possess scripting skills (UNIX shell scripting, Python or Perl) – developing scripting to support new flows
  • You are fluent in using Git
  • You are familiar with CI integration tools e.g. Jenkins, Bamboo
  • Strong communication skills and ability to work well as part of a team
  • A dedicated and focused approach to problem analysis and solving
  • You are able to plan and estimate your own work

Desirable skills

  • Experience with formal verification with exposure of FPGA and/or emulation flows
  • Experience in using Jira and Confluence
  • Experience in Cadence EDA tools especially Vmanagerusage
  • Past experience in media, video, GPU, ISP, or Display projects is a plus
  • Good knowledge about image processing algorithms


  • Manchester/ Cambridge


  • 5+ years


  • Highly competitive to match experience and capability
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