SoC and System Validation Engineer – JobCode: HWDIND080218_40
SoC and System Validation Engineer
4-8 years’ experience in the industry with relevant experience in the area of VLSI/ASIC design, verification, validation and customer support
Experience in silicon validation of Power Management Subsystem, including power control digital state machines, Voltage Regulators/buck converters (internal and external), LDOs and related digital/analog circuits.
Experience in estimating, characterizing and measuring power consumption of digital clusters (CPU, Memory, IOs, etc).
Familiarity with power topologies and existing PMIC/power solutions
Exposure to power measurement automation (scripts, equipment) is a plus.
Exposure to IP modules/SoC subsystems/Interfaces such as Timer, Clock, Reset, Microcontroller, CAN, SPI, LIN, UART etc.
Experience in silicon validation of digital logic/blocks, using functional and requirements based validation methodologies
Familiarity with Pre-Si verification methodology, Post-Si validation concepts, Validation/Test plans & reports, post-Si validation environment and test writing/debug Experience in Perl / Python / Shell scripting and languages such as C, Assembly, etc. is a must
Experience in using lab equipments such as Oscilloscopes, Protocol Analyzers/Exercisers, Mid-bus Probes, Logic Analyzers, JTAG based Debuggers etc.
Working knowledge of UNIX, Windows and embedded operating system
Candidates should have strong written and verbal communication skills
Exposure to test development on system simulators and emulators is an advantage
4 to 8 years
Highly competitive to match experience and capability