Job Code: HWVIND_02

Job Description:

  • BS/MS with 4-6 years of experience in verification.
  • Experience with development of UVM/OVM and/or Verilog, System Verilog test benches and usage of simulation tools/ debug environments such as Synopsys VCS, Cadence IES.
  • Require strong understanding of state of the art of verification techniques, including assertion and metric-driven verification
  • Familiarity with verification management tools as well as understanding of database management particularly as it pertains to regression management. is a plus
  • Strong understanding of different phases of ASIC and/or full custom chip development is required
  • Experience with FPGA programming and software is a plus.
  • Experience with one of scripting language like perl, python is a plus

 

Location: Hyderabad/ Bangalore

Package

  • Highly competitive to match experience and capability

How To Apply:¬†Send your CV with Job Code to [email protected]