Design Verification – JobCode: HWVIND090818_422018-08-09T11:45:06+00:00

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Job Title:

Design Verification

Job Code:

HWVIND090818_42

Job Description

  • Functional verification (including UVM, System Verilog, Perl), Gate Simulation. Exposure to Mix-Signal verification will be desirable.

Location

  • Hyderabad

Experience

  • 3+ Years

No of Positions Available

  • 3

Package

  • Highly competitive to match experience and capability
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