- Expert in IP/SOC Verification – UVM based Verification Methodologies.
- Develop block-level/SOC test plans based on the design/architectural specs.
- Expert in UVM based Verification Methodologies and capable of build IP/SOC verification environment, testbench and Test sequences from scratch.
- Run simulations & regressions, debug test failures to identify test case issues & RTL design issues.
- Earlier experience with State-machine based architectures verification. (FSM Control logic and not CPU based)
- Self-driven and capable for independent work and independent decision making.
- Knowledge in verifying IPs Serial Standard interfaces, Memory controllers
- Exposure to Low-power design, System Security considered as added advantage
- Hands on verification experience on complex multi clock domain blocks
- Expert in design & verification languages such as VHDL, Verilog, C and System Verilog.
- Expert in Formal and Metrics driven verification methodologies
- Experience in pre-silicon FPGA platform based verification
- Knowledge in scripting tools like Perl and Python
- 5+ Years
- Highly competitive to match experience and capability