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RTL Design Engineer – JobCode: HWVUK051218_232018-12-05T11:42:18+00:00


Job Title:

RTL Design Engineer

Job Code:


Job Description

  • VHDL and System Verilog Experience
  • Experience of creating RTL designs from scratch and integrating existing RTL IP
  • Experience of Synthesis and STA (Static Timing Analysis)


1 senior and 2 intermediates

  • Senior: 8+ years – must have experience of managing teams
  • Intermediate: 5- 8 years


  • UK


  • Highly competitive to match experience and capability
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