Senior ASIC/FPGA Verification – JobCode: HWVSWE_210618_042018-06-21T11:12:37+00:00

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Job Title:

Senior ASIC/FPGA Verification , High speed communication

Job Code:

HWVSWE_210618_04

Job Description

  • The project scope is to develop new radio technology for 5G and some new radio based products for 4G.
  • You will work with functional verification of new high speed communication protocols.

Competence/Experience – Mandatory:

  • Long experience from ASIC/FPGA verification and test bench development
  • ASIC verification
  • FPGA verification
  • Complex ASIC/FPGA verification
  • test bench development
  • test bench development from scratch
  • Good knowledge of System Verilog and VHDL
  • Experience from block level and sub-system level test benches using UVM
  • Familiar with all components in a classic UVM environment
  • Block level using UVM
  • Sub-system level using UVM
  • Very good experience in high speed interface protocols
  • Knowledge how to write high quality verification documentation

Competence/Experience – Optional:

  • Experience from working with Specman/e
  • Programming skills in SystemC and TLM
  • Modelling in Matlab and Simulink
  • Knowledge of communication protocols
  • Ethernet
  • CPRI
  • Serdes
  • CPU/DSP knowledge
  • Experience from digital filters
  • Ability to coach junior developers
  • Experience from working with Agile development methodology

Location

  • Kista, Sweden

Experience

  • 6+ Years

Package

  • Highly competitive to match experience and capability
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