Senior ASIC/FPGA Verification, System Verilog – JobCode : HWVSWE_150818_052018-08-16T05:52:39+00:00

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Job Title:

Senior ASIC/FPGA Verification, System Verilog

Job Code:

HWVSWE_150818_05

Job Description

  • Develop new radio technology in 5G Radio Base Stations, performing functional verification of new ASICs and FPGAs.
  • Must have vast experience from ASIC/FPGA verification and test bench development
  • Excellent knowledge of System Verilog and UVM
  • Good programming skills & debugging.
  • Experience with IP level and system level verificationExperience with IP level and system level verification
  • Good English (Swedish optional)

Location

  • Sweden

Experience

  • 10 years+ applicable experience in similar position

Package

  • Highly competitive to match experience and capability
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