SOC Verification Engineer
- Main activity would be verification so would need to understand testbenches.
- Expected to perform tasks such as stitching IP together and running simulations to prove connectivity
- Help with ramp-up and understanding the needs of the project.
- Familiarity with Arm IP
- Knowledge on Cortex-A processor
- Understand Verilog RTL & SystemVerilog
- Knowledge on writing assembly or C tests
- An understanding of makefiles is necessary
- Familiarity with simulators including Mentor Questasim, Synopsys VCS & Cadence Incisive
Nice to have:
- Knowledge on Coresight debug
- Understanding Linting and DFT checks
- 5 to 7 years
- Highly competitive to match experience and capability