- Must have hands-on experience on GLS and strong knowledge in testbench and regression automation, industry standard bug tracking, and coverage methodology.
- Also need in-depth knowledge in SoC architecture, including CPUs (preferably ARM), memory subsystems, multi-domain clocking, and bus & interconnect structures (preferably AHB and AXI).
- Must have excellent system debug skills. Excellent oral and written communication skills & ability to work in a team environment.
- Prior working experience with SoC GLS setup/scripting/debug. Exposure to palladium is highly preferred.
- Domain knowledge in one or more areas preferred: DDR3/4 PHY and controllers, PCIe, SATA, Ethernet, DMA.
- 5 – 8 years of experience in ASIC/SOC verification
- Highly competitive to match experience and capability