CDC checking of any asynchronous clock domain crossing requires that the data path and the control path be identified and that the receive clock domain data flow is controlled by a multiplexer with a select line that is fed by a correctly synchronized control line.

The structural checking approach does not care if the asynchronous transitions are slow to fast clocks or fast-to-slow clocks.  It will ensure that all the transitions are correctly synchronized in terms of having the appropriate synchronizer flops.

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