|Title:||Unlock your ABV Potential Beyond Simulators and Model Checkers|
Abstract: Assertion-based verification is an established part of simulation and formal approaches to verification. Yet the ability to develop assertions can be a tedious iterative process. While assertions can be extended to use in emulation, is that the best use of this costly resource? How can the assertion infrastructure be further leveraged to help efficiently debug FPGA prototypes?
This presentation explores post-processing techniques to accelerate assertion development and extend usage of assertions to emulation and FPGA-prototype debug in a very practical way.
Biography: Ajay Sharma joined Synopsys as application consultant in 2012 with the SpringSoft acquisition. Prior to joining Synopsys Ajay has done application engineering for Springsoft and IKOS.
He has first class engineering degree from De-Montfort and Physics degree from University of Mumbai.
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