Theme: Coverage Closure

  • Meeting Date: Tuesday 1st December, 2015

The principal goal of DVClub Europe is to have fun while helping build the verification community through regular educational and networking events.  DVClub Europe  2015 attendance is free and is open to all non-service provider semiconductor professionals.

Agenda (GMT)

11.30Arrival and Networking
12.00Welcome and Introduction
– T&VS, Mike Bartley,  (CEO and Founder)
12.05Unifying Coverage Closure When Using Different Verification Techniques
– Infineon Technologies UK Ltd, Darren Galpin  (System IP Verification Manager)
12.25Bring IP Verification Closure to SoC, Scalable Methods to Bridge the Gap between IP and SoC Verification
– Freescale Semiconductor Inc. Gaurav Gupta (Staff Design Engineer)
12.45System-Level Coverage Closure with Graph-Based Portable Stimulus
Breker Verification Systems, Tom Anderson (VP Marketing)
13.05Reaching Coverage Should Be Science Not Art
Synopsys, Adiel Khan (Senior Staff Engineer, Verification Group Business Unit.)
13.25Close and Networking


  • Bristol: Broadcom, 910 Aztec West, Almondsbury, Bristol, BS32 4SR
  • Cambridge: ARM, 110 Fulbourn Road, Cambridge, CB1 9NJ
  • Grenoble: STMicroelectronics – Polygone Scientifique, 12 Rue Jules Horowitz, Grenoble
  • Sophia: Business Pôle, Entrée A, 1047, Route des Dolines, 06901 Sophia Antipolis Cedex
  • Remote Access