Accelerating your SoC Verification

DVClub Europe Meeting – February 2021

Event at a Glance

  • Tuesday 23rd February, 2021

  • 12:00 – 13:30 GMT

  • FREE to attend Online

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Accelerating your SoC Verification

IP Integration Into Complex SoCs

  • Four verification experts will spend 20 minutes each outlining tools and methodologies aimed at accelerating your SoC Verification

Agenda (GMT):

TimeSession Description          Slides             Videos
12.00 GMT 17:30 ISTWelcome and Introduction
Mike Bartley, Senior Vice President – VLSI Design, Tessolve
12.05 GMT 17:35 ISTAccelerating your SoC Verification with System VIP
Nick Heaton, Distinguished Engineer, Cadence Design Systems
12.25 GMT 17:55 ISTLeveraging a Synthesizable VerificationOS for bug-free SoCs
David Kelf, CMO, Breker Systems
12.45 GMT 18:15  ISTAutomating IP and SoC Verification
Anupam Bakshi,  CEO and Founder, Agnisys, Inc.
13.05 GMT 18:35 ISTVerification Beyond the Core
Nicolae Tusinschi,  Product Specialist Design Verification, OneSpin Solutions.
13.25 GMT 18:55 ISTClosing Remarks
13.30 GMT 19:00 ISTClose

About DVClub

The principal goal of each DVCLUB meeting is to have fun while helping build the European verification community through regular educational and networking events. Attendance at DVClub Europe meetings is free and is open to all non-service provider semiconductor professionals. Each meeting addresses a specific issue faced by the design and verification community and whatever your speciality provides an excellent opportunity for updating knowledge as well as share experiences, insights and issues with other members of the verification community.


DVCLUB Europe is made possible through the generosity of our sponsors.