Conference:DVClub Europe 2015 (click here to see full programme)
Speaker:Adnan Hamid, Co-Founder and CTO
Organisation:Breker Verification Systems, Inc.
Presentation Title:Cache Coherency Verification with Vertical and Horizontal Portable Stimulus
Abstract:The industry is buzzing over the need for portable stimulus and tests, including an active Accellera working group looking to standardize this area. Portability must include vertical reuse from IP block to subsystem to SoC, and horizontal reuse from ESL model to RTL simulation to hardware platforms, including silicon in the bring-up lab.This talk uses cache coherency verification, a critical need in today’s multiprocessor systems, as an example for portable stimulus. Most cache coherency verification occurs with generated C test Cases that run on embedded processors at every phase of the project, from ESL models through actual silicon. These test cases can be tuned for each platform, enabling true horizontal verification reuse. For IP blocks and subsystems that do not include the processors, test cases can be generated in the form of Transactions for bus models within a UVM simulation testbench. This enables true vertical reuse as well.

  • Truly portable stimulus must Support vertical and horizontal reuse
  • Cache coherency verification via generated C test cases is horizontally reusable
  • Cache coherency verification is also vertically reusable from Transactions on bus models to C test cases running on multiple embedded processors
BiographyAdnan Hamid is co-founder and CTO of Breker Verification Systems, focusing on SoC verification. His background includes managing AMD’s System Logic Division and serving as an expert in system-level verification at Cadence. Adnan received BS degrees in Electrical Engineering and Computer Science from Princeton, and an MBA from UT- Austin.

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