Conference:DVCLUB Europe: SAFETY (Nov 2016)
Speaker:Simon Davidmann
Organisation:Imperas Software Ltd.
Presentation Title:Software Verification for Low Power, Safety Critical Systems
Abstract:The goal of the SAFEPOWER project (an EU Horizon 2020 programme) is to enable the development of low power mixed-criticality systems through the provision of a reference architecture, platforms and tools to facilitate the development, testing, and validation of these kinds of systems according to the market needs. This presentation will provide an overview of SAFEPOWER – Xilinx Zynq 7000 device, hypervisor, OS, applications – then focus on the software architecture which help address safety critical aspects of the platform, and talk about software simulation tools (for example for power estimation and management) and software verification.

  • Software, especially hardware-dependent software (HDS), is critical for delivery of SoCs
  • Just as with hardware verification, for software verification simulation is a necessary but not sufficient technology; additional tools are needed
  • Extra-functional characteristics, such as power, need additional focus
Speaker Bio:Simon Davidmann has been working on simulators and EDA products since 1978. He is founder and CEO of Imperas and initiator of Open Virtual Platforms ( – the place for Fast Processor Models. Prior to founding Imperas, Simon was a VP in Synopsys following its successful acquisition of Co-Design Automation, the developer of SystemVerilog. Prior to founding Co-Design Automation, Simon was an executive or European GM with 5 US-based EDA startups including Chronologic Simulation, which pioneered the compiled code simulator VCS, and Ambit, which was acquired by Cadence for $280M. Simon was one of the original developers of the HILO logic simulation system, co-authored the definitive book on SystemVerilog, and is a visiting Professor of Digital Systems at Queen Mary, University of London.

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