Safety critical development processes, governed by standards such as ISO26262, include the use of fault correction components that protect the device against Random faults that occur naturally during operation. A methodology has evolved that makes use of fault simulation and formal techniques to establish the diagnostic coverage of safe faults, and detect dangerous faults. A significant remaining challenge is the debug of these dangerous faults. While fault simulation can establish fault propagation, Formal can produce a clear detection of dangerous faults, enable their debug, and indicate how a design may be protected against their occurrence. This presentation will discuss these dangerous fault debug techniques using state-of-the-art formal verification apps.
ISO26262 requires a high proportion of Random operational faults that occur during operation to be managed correctly.The debug of faults proven dangerous via the diagnostic coverage process remains a complex, time consuming problem.Formal Verification may improve a number of safety verification functions, including the debug of these complex fault scenarios.
Jörg Große is the Product Manager for Functional Safety at OneSpin and has more than 20 years of experience in EDA, functional verification and ASIC design. As co-founder of a successful Silicon Valley based startup, he was central in developing the concept of fault/mutation testing into a state-of-the-art EDA tool. He deployed this technology in many leading semiconductor companies, increasing the quality of their functional verification. He holds a Dipl.-Ing.(FH) in Electrical Engineering from the University of Applied Science Anhalt.