Abdelouahab Ayari, Application Engineer, Mentor: A Siemens Business
The verification techniques of clock domain crossing designs (CDCs) are well understood. However, a new breed of domain crossings introduce challenging issues in design and verification. These are Reset Domain Crossings (RDC), brought on by the rise of increased use of third party IPs, aggressive power management and the increased rise of the use of asynchronous resets. This session explores the differences between CDC and RDC verification, and brings to light the importance of these separate verification tools and techniques for accelerating design-to-market.
3 Key Points:
Design strategies are equally as important as verification strategies. It is unreasonable to assume all bugs can eventually be found through verification efforts.
What can hardware design and verification learn from Software development and testing?
How and data and analytics be used to help?
Abdelouahab Ayari, Ph.D. is an application engineer for formal verification, clock domain crossing, and low power verification. He received his doctor in formal verification at the University of Freiburg and worked for Micronas GmbH before joining Mentor Graphics. He has over 15 years.
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