Conference:Verification Futures 2015 (click here to see full programme)
Speaker:John Aynsley, CTO
Presentation Title:A View of the Verification Training Market
Abstract:The verification skills gap continues to challenge companies both large and small. We review the situation from the point-of-view of a specialist training company, looking at the choices being made regarding verification languages and methodology on the most complex SoC projects as well as how FPGA design teams are dealing with their increasing verification challenges.

  • Trends in the adoption of hardware design and verification languages and methodologies
  • The verification skills gap for both FPGA and SoC
  • Approaches to closing the verification skills gap
BiographyJohn Aynsley is co-founder and CTO at Doulos, where he runs the technical team as well as consulting for customers and delivering training courses and seminars. John has spent his entire career working in EDA, specializing in hardware description and verification languages, in particular VHDL, SystemC, SystemVerilog, and now UVM.