Verification Futures Europe 2018 2018-06-18T07:17:01+00:00

Verification Futures 2018

Now in its 8th successful year, VF2018 Europe now incorporates Formal Verification 2018 and is a unique one day conference, exhibition and industry networking event organised by T&VS in partnership with the community that discusses the challenges faced in hardware and software verification.  For VF2018 the program includes a focus on formal verification and tracks covering safety, security and software testing.

The event gives the opportunity for end users to define their current and future verification challenges and collaborate with the vendors to create solutions. It’s also an excellent opportunity to network and catch up with other verification engineers across Europe.

Event at a Glance

  • Thursday 14th June, 2018

  • Full day conference, exhibition and networking event
  • Reading (UK) and online
  • FREE to attend In-Person or Online


The program was last updated on: May 31, 2018

08:30 Registration, Coffee and Networking     Slides  Videos
Single Track Plenary Session
09:25 Welcome: Mike Bartley, Test and Verification Solutions Ltd

Keynote Presentation:

Tolerating Individual Failure to Survive
Peter Davies, Director – Security Concepts, Thales

User Verification Challenges – Three Challenges from Users
10:00 Challenge 1: Bit Exact Verification Using Matlab in UVM and more…
Norbert Fried, Satixfy
10:10 Challenge 2: The Challenges of Autonomous Commercial Vehicles
Nicholas Clay, Head of Homologation and Quality, Arrival
10:20 Challenge 3: V&V Challenges for Urban Autonomous Vehicles
John Redford, Chief Architect & VP Perception, FiveAI
10:30 Moving the Needle – Faster and Smarter Verification
Mike Stellfox, Cadence
11:00 Refreshments and Networking
Multiple Track Session | Morning tracks: Safety, Software Testing and Formal Verification
Track 1A: Safety
11:40 A Summary of Challenges Identified at the Workshop on ‘Dynamic Testing for the Verification of Autonomous Systems’
Anas Shrinah & Nyasha Masamba, University of Bristol
12:00 Autonomous Systems: Accelerating Innovation Through Cooperation and Consensus in Standards
Alex Price, Lead Programme Manager, British Standards Institution
12:20 Linux Safety Verification: A Process for Using Linux in Safety-Critical Environments
Dr. Lukas Bulwahn, BMW Car IT GmbH
Track 2A: Software Testing
11:40 Metamorphic Testing for “Non-Testable” Systems
Alastair Donaldson, Reader and EPSRC Early Career Fellow, Imperial College London
12:00 AI For Coding
Darren Royle, Development Team Lead, Diffblue
12:20 Lockstep Debugging for Software Verification
Ed Jones, Compiler Engineer, Embecosm
Track 3A: Formal Verification (Morning Sessions)
11:40 Formal 2025: My Vision
Dr Ashish Darbari, Founder & CEO, Axiomise
12:00 Efficient Formal Verification of Liveness and Freedom from Deadlock
Pradeep Kumar Nalla, Senior Test and Verification Engineer, Test and Verification Solutions
12:20 Efficient Verification of Multi-Property Designs (The Benefit of Wrong Assumptions)
Matthias Güdemann, Senior Research Engineer, Diffblue
12:40 Lunch and Networking
Single Track Plenary Session
13:40 Fault Injection & Formal – Made for Each Other
Iain Singleton, Applications Engineer, Synopsys
Multi-Track Session | Security, Hardware Verification and Formal Verification
Track 1B: Security
14:15 Security Starts with Risk Assessment and Threat Modelling
Duncan Purves, 2 Insight Ltd
14:35 Processor Intrusion Detection
Mark Zwolinski, University of Southampton
14:55 Cyber Security in the V2X Communications
Gunwant Dhadyalla, Principal Engineer, Cyber Security Centre – University of Warwick
Track 2B: Hardware Verification
14:15 Merging, Ranking and Metrics Reporting – Unified Regression Reporting Flow Using Ranking
Mark Daniel, Infineon Technologies
14:35 Applying the Theory of Marginal Gains to Boost Verification Effectiveness
Chris Brown, Arm
14:55 Python for Verification!
Donald McCarthy, Infineon Technologies
Track 3B: Software Formal Verification (Afternoon Sessions)
14:15 Development and Formal Verification of Secure Updates for Embedded Systems
Roderick Chapman, Protean Code Ltd
14:35 High(er) Assurance Blockchains: Functional and Performance Verification in the Software Design Process
Neil Davies, Chief Scientist, Predictable Network Solutions Ltd
14:55 Automatic Formal Verification
Nick Tudor, D-RisQ Ltd
15:15 Refreshments, Networking & Meet the Sponsors
Single Track Plenary Sessions
15:45 Verification Productivity with Portable Stimulus
Nigel Elliot, Technical Director, Mentor Europe Digital Design & Verification
16:00 Challenges Call for Innovation: A Recipe for Success and a Taste of Formal Solutions
Sergio Marchese, Technical Marketing Manager, OneSpin Solutions
16:15 Practical Applications of Portable Stimulus
David Kelf, CMO, Breker Verification Systems
16:30 Panel Discussion
16:45 Event Closes


By Registering you can guarantee your FREE delegate place either in-person or online.


  • Holiday Inn (Junction 10), Wharfedale Road, Winnersh Triangle, Reading. RG41 5TS
  • Visit Hotel Website


VF2018 is made possible through the generosity of our sponsors.

Call for Submissions – Now Closed

The Call for Submissions closed on: Friday 23rd February, 2018.  Thanks to everyone who submitted a proposal.  Please Contact Us if you would like to propose a talk for 2019.

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