Verification Futures Europe 2018 2018-08-13T10:36:39+00:00

Verification Futures 2018

Now in its 8th successful year, VF2018 Europe incorporated Formal Verification 2018 and provided a unique one day conference, exhibition and industry networking event.  Organised by T&VS in partnership with the community the event attracted over 400 participants, either In-Person or Online, to discuss the challenges faced in hardware and software verification.  For VF2018 the program included a focus on formal verification in addition to tracks covering safety, security and software testing.

The event gave the opportunity for end users to define their current and future verification challenges and collaborate with the vendors to create solutions. It’s also provided an excellent opportunity to network and catch up with other verification engineers across Europe.

Event at a Glance

  • Thursday 14th June, 2018

  • Full day conference, exhibition and networking event
  • Reading (UK) and online
  • FREE to attend In-Person or Online

Agenda and Presentations

08:30Registration, Coffee and Networking    Slides Videos
Single Track Plenary Session
09:25Welcome: Mike Bartley, Test and Verification Solutions Ltd

Keynote Presentation:

Tolerating Individual Failure to Survive
Peter Davies, Director – Security Concepts, Thales

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User Verification Challenges – Three Challenges from Users
10:00Challenge 1: Bit Exact Verification Using Matlab in UVM and more…
Norbert Fried, Satixfy
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10:10Challenge 2: The Challenges of Autonomous Commercial Vehicles
Nicholas Clay, Head of Homologation and Quality, Arrival
10:20Challenge 3: V&V Challenges for Urban Autonomous Vehicles
John Redford, Chief Architect & VP Perception, FiveAI
10:30Moving the Needle – Faster and Smarter Verification
Mike Stellfox, Cadence
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11:00Refreshments and Networking
Multiple Track Session | Morning tracks: Safety, Software Testing and Formal Verification
Track 1A: Safety
11:40A Summary of Challenges Identified at the Workshop on ‘Dynamic Testing for the Verification of Autonomous Systems’
Anas Shrinah & Nyasha Masamba, University of Bristol
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12:00Autonomous Systems: Accelerating Innovation Through Cooperation and Consensus in Standards
Alex Price, Lead Programme Manager, British Standards Institution
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12:20Linux Safety Verification: A Process for Using Linux in Safety-Critical Environments
Dr. Lukas Bulwahn, BMW Car IT GmbH
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Track 2A: Software Testing
11:40Metamorphic Testing for “Non-Testable” Systems
Alastair Donaldson, Reader and EPSRC Early Career Fellow, Imperial College London
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12:00AI For Coding
Darren Royle, Development Team Lead, Diffblue
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12:20Lockstep Debugging for Software Verification
Ed Jones, Compiler Engineer, Embecosm
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Track 3A: Formal Verification (Morning Sessions)
11:40Formal 2025: My Vision
Dr Ashish Darbari, Founder & CEO, Axiomise
12:00Efficient Formal Verification of Liveness and Freedom from Deadlock
Pradeep Kumar Nalla, Senior Test and Verification Engineer, Test and Verification Solutions
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12:20Efficient Verification of Multi-Property Designs (The Benefit of Wrong Assumptions)
Matthias Güdemann, Senior Research Engineer, Diffblue
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12:40Lunch and Networking
Single Track Plenary Session
13:40Fault Injection & Formal – Made for Each Other
Iain Singleton, Applications Engineer, Synopsys
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Multi-Track Session | Security, Hardware Verification and Formal Verification
Track 1B: Security
14:15Security Starts with Risk Assessment and Threat Modelling
Duncan Purves, 2 Insight Ltd
14:35Processor Intrusion Detection
Mark Zwolinski, University of Southampton
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14:55Cyber Security in the V2X Communications
Gunwant Dhadyalla, Principal Engineer, Cyber Security Centre – University of Warwick
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Track 2B: Hardware Verification
14:15Merging, Ranking and Metrics Reporting – Unified Regression Reporting Flow Using Ranking
Mark Daniel, Infineon Technologies
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14:35Applying the Theory of Marginal Gains to Boost Verification Effectiveness
Chris Brown, Arm
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14:55Python for Verification!
Donald McCarthy, Infineon Technologies
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Track 3B: Software Formal Verification (Afternoon Sessions)
14:15Development and Formal Verification of Secure Updates for Embedded Systems
Roderick Chapman, Protean Code Ltd
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14:35High(er) Assurance Blockchains: Functional and Performance Verification in the Software Design Process
Neil Davies, Chief Scientist, Predictable Network Solutions Ltd
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14:55Automatic Formal Verification
Nick Tudor, D-RisQ Ltd
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15:15Refreshments, Networking & Meet the Sponsors
Single Track Plenary Sessions
15:45Verification Productivity with Portable Stimulus
Nigel Elliot, Technical Director, Mentor Europe Digital Design & Verification
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16:00Challenges Call for Innovation: A Recipe for Success and a Taste of Formal Solutions
Sergio Marchese, Technical Marketing Manager, OneSpin Solutions
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16:15Practical Applications of Portable Stimulus
David Kelf, CMO, Breker Verification Systems
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16:30Panel Discussion
16:45Event Closes


VF2018 is made possible through the generosity of our sponsors.

Call for Submissions – Now Closed

The Call for Submissions closed on: Friday 23rd February, 2018.  Thanks to everyone who submitted a proposal.  Please Contact Us if you would like to propose a talk for 2019.

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