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Efficient methodology for Verification of Dynamic Frequency Scaling of clocks in SoC

DFS is a new era feature in the modern SoCs and it is thorough verification is equally important to have a bug free silicon and reduce R&D cost. In this paper, we have presented multiple features in a testbench by which we can do robust verification of the DFS feature in the SoC.

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1st July, 2015|Blog, Thought Leadership|