In this article Richard Pugh of Mentor Graphics argues that there are currently 3 main approaches to SoC Verification

  • Verification IP based verification where the main focus is to verify a new piece of IP.
  • FPGA-based which is useful when the hardware is stable and you are mainly spinning on the software.
  • In-Circuit Emulation (where the emulation is physically attached to peripherals) which can support rapidly changing hardware and software but has the potential drawback of being tied to a lab environment with a lack of easy access.

Mentor Graphics announced in 2012 an approach which would end the reliance on external hardware devices running models of your target peripherals and instead allow you to put the emulator in your general data centre and treat it as just another computing resource.This new emulation approach, or “Virtual lab”, lets you load your target protocol on the emulator alongside your design and drive the software side of the test process from a PC where your real target OS, drivers and applications run safely inside a virtual machine.

In this article Richard Pugh outlines the “Virtual lab” approach.

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