Cadence unveils its first-silicon results for both DDR4 and LPDDR4 IP on TSMC’s 16nm FinFET Plus (16FF+) process, with test chips operating at 3200Mbps.

This speed can support the computation requirements for tomorrow’s high-resolution video and data bandwidth requirements of mobile, cloud, and networking devices. This blog highlights the details of the silicon test chips, testing environments, and validation of both IPs operating at 3200Mbps.

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