Taking a step-wise approach to verifying interactions between embedded processors and the IPs in the rest of the design saves time by finding bugs earlier in the verification process when they’re easiest to debug and correct.Portable stimulus allows high-quality tests to be generated from test intent that is described once and retargeted to multiple environments.This article outlines how a single description of test intent, for testing access to SoC registers as a part of SoC integration testing, can be easily targeted to both UVM and embedded-software environments.

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Find out how T&VS portable stimulus specification addresses today industry verification challenges.