Job Title:

Senior FPGA Designer, digital back-end

Job Code:


Job Description

  • The project scope is to develop new radio technology in Radio Base Stations.
  • You will work with top level development of the digital back-end in Xilinx FPGAs.
  • The work will be carried out in cooperation with other FPGA designers.

Competence/Experience – Mandatory:

  • Long experience from working with ASIC/FPGA
  • Long experience in FPGA synthesis
  • Long experience in FPGA floor-planning
  • Long experience in FPGA static timing analysis
  • Long experience in FPGA timing closure
  • Experience in FPGA area optimization
  • Experience in Timing constraints development
  • Experience from multi-clock domain FPGA projects
  • ClearCase version control system experience
  • Scripting in Perl, Python, Bash or C-shell

Competence/Experience – optional:

  • Experience in working with analog-mix-signal FPGA devices
  • Experience working with Xilinx analog-mix-signal FPGA devices
  • Experience in working with Xilinx Zync ZU-XXR AMS FPGA devices
  • Experience in top-level integration
  • Xilinx ICE top level integration
  • Xilinx Vivado top level integration
  • Experience in FPGA transceiver knowledge
  • VHDL and Verilog knowledge
  • System Verilog
  • Experience from multi-clock domain FPGA projects
  • Good skills in working with UNIX and/or Linux
  • Experience in agile ways of working, in particular agile scrum


  • 7+ Years


  • Sweden


  • Highly competitive to match experience and capability
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