Every chip has in-house and commercial IP, mixed signal components and a slew of tools. What’s the best way to put them together, and how do you wade through the mountains of data?
That’s certainly one approach, but whether it will be a good solution for SoC design remains to be seen. More pieces, whether big or small, more interactions between those pieces, and more things that can go wrong is making it far harder to create working silicon, to integrate more IP blocks and subsystems into those SoCs, and much, much harder to optimize all of it. Even data that is created to track problems and solve issues is becoming a problem by itself.