The Master and Slave AMBA® AXI-Lite VIP (Advanced eXtensible Interface) is a highly flexible and configurable verification IP that can be easily integrated into any SOC verification environment. Supporting both UVM and OVM, this AXI VIP is part of the asureVIP portfolio of implementation-proven VIP offerings.
The Master and Slave components have been interoperability tested and come with a Bus Monitor for performing all protocol checks. The monitor also performs key protocol checks and reports errors for non compliance with ARM AMBA4 AXI and ACE Protocol speccification. This VIP has also been verified for protocol compliance using asureSIGN, T&VS’ in-house Requirements Management and Tracking tool.
Customers using the asureVIP products do so with the confidence of knowing that they have been independently developed by T&VS and successfully deployed by leading SoC companies around the world.
T&VS can also offer asureVIP customers an independent hardware verification service (asureVERIF) that not only reduces development costs and time-to-to-market, but also improves product quality.
- VIP: AMBA AXI-Lite Master or Slave
- Compliance: AMBA4 AXI and ACE Protocol Specification
- Language: System Verilog
- Methodology: OVM 2.1.1 / UVM 1.1
- Simulators: Cadence Incisive, Mentor Questa, Aldec Riviera-PRO
AXI Lite VIP Deliverables
- AXI-Lite Master or Slave VIP
- Sample Virtual Sequencer
- Sample Scoreboard
- VIP User Guide
VIP Technical Specifications
The following features are supported:
- All transaction burst length 1
- Data bus width 32/64-bit
- Write Strobes
- Multiple outstanding transactions
- asureSIGN AMBA AXI LITE VIP Datasheet
Find out more
For more information or to discuss you requirements, please Contact Us.
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