Joerg Richter, R&D Director in the Verification group at Synopsys, will address software bring-up in his keynote at Verification Futures. Advanced SoC verification teams are now driven by not only reducing functional bugs, but also by how early they can achieve software bring-up for the SoCs.
Joerg will outline how the Synopsys verification platform gives support from architecting a design and verification environment, to performing high-capacity, high performance static and formal applications, to achieving RTL signoff with advanced coverage closure, to address software bring-up with emulation and FPGA-based prototyping.
Verification Futures, held on February 5th in Reading UK and online, is a unique free one day conference, exhibition and industry networking event organised by TVS to discuss the challenges faced in hardware verification. The event gives the opportunity for end users to define their current and future verification challenges and collaborate with the vendors to create solutions.