Making your products more Reliable, Safe and Secure

Using Agile Methods for Hardware

Agile development methodology is seen as a quick and highly suited approach for various kinds of environments.  This article from Semiengineering captures a conversation between industry experts on how hardware teams use agile methods in SoC designs. Read More Learn more about T&VS Agile methods for Hardware Development

8th February, 2016|Blog, Thought Leadership|

ASIC prototyping with FPGA

Today’s ASIC designs have become huge in comparison to the past making the process of verification extremely complicated. FPGAs are getting bigger and bigger in terms of capacity and I/O. Considering design size and sophistication, even modular verification becomes a not-so-trivial task, especially during testing and SoC verification. This article from Chip Design outlines how [...]

13th January, 2016|Blog, Thought Leadership|

Accurate memory models for all

Most of the electronics systems use memory components either for storing executable software or for storing data, and therefore the availability of accurate memory models are fundamental to most functional verification strategies. Making these models available in proven, standards-based libraries is essential. This article from EDN introduces a library that provides a comprehensive memory modelling solution [...]

Risk Avoidance, Hardware Emulation Style

Hardware emulation has become the centerpiece in the verification and it is now used for debugging both the hardware and the embedded software of complex SoC designs without any size limitations. Verification Consultant, Lauro Rizzatti, outlines why hardware emulation is the only way to avoid risk for SoC design debugging. Read More Learn more about [...]

31st December, 2015|Blog, Thought Leadership|

Low-Power SoC Design Integration Issues

As technology evolves, more functionality is being added on SoCs. Battery powered SoCs require much more aggressive power reduction techniques. All of these SoCs today have a large number of power and clock domains and they have hundreds of IPs and memories. This article from Anysilicon outlines how to minimize the issues of low power [...]

17th December, 2015|Blog, Thought Leadership|

Co-Verification for Complex SOC Designs at DVClub Bangalore, 9 APR 15

DVClub brings together technology users, developers and industry experts to network, share best practices on critical design and verification issues. DVClub is a unique platform to discuss trends and explore challenges in design and verification. This time around ChristDas from TVS, Singapore will be discussing on the topic “Co-Verification for Complex SOC Designs” at Cadence office , Ecospace [...]