CDNLive EMEA 2014 brought together a record number of Cadence technology users, developers, and industry experts to network, share best practices on critical design & verification issues, and discover new techniques for realizing advanced silicon, SoCs, and systems.
At the event, Mike Bartley, CEO and Founder of TVS presented an informative session on using UVM-ML to support reuse in the multi-language verification environment.
What do you do when you’ve got an SoC verification project involving a testbench with a mix of different languages? In this short video Mike explains how using open-source UVM-ML has allowed his team to reuse its legacy multi-language verification environment in a new UVM testbench environment. The team was able to wrap its Cadence® Incisive® Enterprise Specman Elite® Testbench in a UVM framework.
View the full set of Presentation Slides here.
View the Executive Summary
Additional Presentation Resources
- View the video on the TVS YouTube Channel
- Learn more about Incisive Enterprise Specman Elite Testbench here