Neural Network Efficiency with Embedded FPGA’s

The traditional metrics for evaluating IP are performance, power, and area (PPA). Since PPA measures can be difficult to assess, there is a related set of characteristics of importance, especially given the increasing integration of SoC circuitry associated with deep neural networks (DNN)namely, the implementation energy and area efficiency. This article shows how neural network efficiency affects the performance of embedded FPGAs.

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2018-10-10T11:18:04+00:0010th October, 2018|Blog, Thought Leadership|