Bristol, UK, 29 September 2014 – T&VS, a leader in software test and hardware verification solutions, today announced that is presenting and exhibiting at the inaugural Design & Verification Conference and Exhibition Europe (DVCon Europe) to be held in Munich on 14-15 October 2014 at the Hilton City hotel. The company will be showcasing its driven verification and analogue mixed-signal (AMS) capabilities, together with other product developments.
DVCon Europe is a new conference for the application of software languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. DVCon has run successfully for over twenty years in Silicon Valley, so event organisers are expecting a great deal of interest in the first DVCon Europe.
At DVCon Europe, T&VS will be presenting two papers and one tutorial:
- T&VS’s tutorial: ‘Requirements Driven Verification and Test (RDVT)’ will be on Tuesday October 14th at 11.30-13.00 and will outline what the development standards mandate and how they can be delivered through requirements-driven verification methodology.
- T&VS’s first paper: ‘Practical Experience in Automatic Functional Coverage Convergence and Reusable Collection Infrastructure in UVM Verification’ will take place on Wednesday 15 October at 11.30-12 to be presented by T&VS’s Suresh Babu in partnership with Roman Wang of AMD.
- T&VS’ second paper: ‘Requirements-Driven Verification Methodology (for Standards Compliance)’ will be held later the same day at 16.00-17.00 to be presented by T&VS’s Mike Bartley and Serrie Chapman.
On its DVCon Europe booth, Stand 1, T&VS will be showcasing its latest capabilities and product developments:
- asureSIGN is a tool for managers, developers and integrators that ensures that product requirements have been successfully tested and implemented.
- asureCOMPLY makes compliance easier with effective verification in the of safety standards compliance.
- AMS VIP (Analogue Mixed-Signal Verification IP), offered as part of T&VS’
asureVIP portfolio, is a suite of tools to provide an efficient, re-usable, development strategy that delivers verification, architecture IP, coverage collection and signoff of AMS designs.
Mike Bartley, CEO of T&VS and DVCon Chair, stated, “Visitors are invited to check out our tutorial and technical talks or come along to our stand for the latest solution demos and announcements; including asureSIGN, our leading-edge leading Requirements Driven Verification tool and our analogue mixed-signal capabilities – or simply stop by for a chat.”
If you’d like to prearrange a meeting at the event please email Mike Bartley of T&VS at: [email protected]
T&VS (Test and Verification Solutions Ltd) provides services and products to organisations developing complex products in the microelectronics and embedded systems industries. Such organisations use T&VS to verify their hardware and software products, employ industry best practice and manage peaks in development and testing programmes. T&VS’ embedded software testing services includes onsite/offshore testing support including assistance with safety certification and security testing. T&VS hardware verification services include onsite/offshore verification support and training in advanced verification methodologies. T&VS also offers Verification IPs and its own Verification (EDA) signoff tool.